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54LS138/DM54LS138/DM74LS138,54LS139/DM54LS139/DM74LS139Decoders/DemulTIplexersGeneral DescripTIonThese Schottky-clamped circuits are designed to be used inhigh-performance memory-decoding or data-rouTIng applicaTIons,requiring very short propagation delay times. Inhigh-performance memory systems these decoders can beused to minimize the effects of system decoding. Whenused with high-speed memories, the delay times of thesedecoders are usually less than the typical access time of thememory. This means that the effective system delay introducedby the decoder is negligible.The LS138 decodes one-of-eight lines, based upon the conditionsat the three binary select inputs and the three enableinputs. Two active-low and one active-high enable inputsreduce the need for external gates or inverters when expanding.A 24-line decoder can be implemented with no externalinverters, and a 32-line decoder requires only oneinverter. An enable input can be used as a data input fordemultiplexing applications.The LS139 comprises two separate two-line-to-four-line decodersin a single package. The active-low enable input canbe used as a data line in demultiplexing applications.All of these decoders/demultiplexers feature fully bufferedinputs, presenting only one normalized load to its drivingcircuit. All inputs are clamped with high-performanceSchottky diodes to suppress line-ringing and simplify systemdesign.FeaturesY Designed specifically for high speed:Memory decodersData transmission systemsY LS138 3-to-8-line decoders incorporates 3 enable inputsto simplify cascading and/or data receptionY LS139 contains two fully independent 2-to-4-line decoders/demultiplexersY Schottky clamped for high performanceY Typical propagation delay (3 levels of logic)LS138 21 nsLS139 21 nsY Typical power dissipationLS138 32 mWLS139 34 mWY Alternate Military/Aerospace devices (54LS138,54LS139) are available. Contact a National SemiconductorSales Office/Distributor for specifications.
