74HC192 pdf datasheet

MM54HC192/MM74HC192Synchronous Decade Up/Down CountersMM54HC193/MM74HC193Synchronous Binary Up/Down CountersGeneral DescripTIonThese high speed synchronous counters uTIlize advancedsilicon-gate CMOS technology to achieve the high noise immunityand low power consumpTIon of CMOS technology,along with the speeds of low power Schottky TTL. TheMM54HC192/MM74HC192 is a decade counter, and theMM54HC193/MM74HC193 is a binary counter. Both countershave two separate clock inputs, an UP COUNT inputand a DOWN COUNT input. All outputs of the flip-flops aresimultaneously triggered on the low to high transiTIon of eitherclock while the other input is held high. The direction ofcounting is determined by which input is clocked.These counters may be preset by entering the desired dataon the DATA A, DATA B, DATA C, and DATA D inputs.When the LOAD input is taken low the data is loaded independentlyof either clock input. This feature allows the countersto be used as divide-by-n counters by modifying thecount length with the preset inputs.In addition both counters can also be cleared. This is accomplishedby inputting a high on the CLEAR input. All 4internal stages are set to a low level independently of eitherCOUNT input.Both a BORROW and CARRY output are provided to enablecascading of both up and down counting functions. TheBORROW output produces a negative going pulse when thecounter underflows and the CARRY outputs a pulse whenthe counter overflows. The counters can be cascaded byconnecting the CARRY and BORROW outputs of one deviceto the COUNT UP and COUNT DOWN inputs, respectively,of the next device.All inputs are protected from damage due to static dischargeby diodes to VCC and ground.