资 源 简 介
This 9-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCC operaTIon.
The SN74LVC823A is designed specifically for driving highly capaciTIve or relaTIvely low-impedance loads. It is parTIcularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
With the clock-enable (CLKEN) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN high disables the clock buffer, latching the outputs. This device has noninverting data (D) inputs. Taking the clear (CLR) input low causes the nine Q outputs to go low, independently of the clock.
A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or the high-impedance state.
