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74164 TTL八位串行入、并行输出移位寄存器

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  • 上传时间:2021-10-09
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  • 标      签: 74164 TTL

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These 8-bit shift registers feature gated serial inputs andan asynchronous clear. A LOW logic level at either serialinput inhibits entry of the new data, and resets the first flipflopto the LOW level at the next clock pulse, thus providingcomplete control over incoming data. A HIGH logic level oneither input enables the other input, which will then determinethe state of the first flip-flop. Data at the serial inputsmay be changed while the clock is HIGH or LOW, but onlyinformation meeting the setup and hold time requirementswill be entered. Clocking occurs on the LOW-to-HIGH leveltransition of the clock input. All inputs are diode-clamped tominimize transmission-line effects.
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