资 源 简 介
The SCAN921023 transforms a 10-bit wide parallelLVCMOS/LVTTL data bus into a single high speed BusLVDS serial data stream with embedded clock. TheSCAN921224 receives the Bus LVDS serial data stream andtransforms it back into a 10-bit wide parallel data bus andrecovers parallel clock. Both devices are compliant withIEEE 1149.1 Standard Test Access Port and Boundary ScanArchitecture with the incorporaTIon of the defined boundaryscantest logic and test access port consisTIng of Test DataInput (TDI), Test Data Out (TDO), Test Mode Select (TMS),Test Clock (TCK), and the opTIonal Test Reset (TRST). IEEE1149.1 features provide the designer or test engineer accessto the backplane or cable interconnects and the ability toverify differenTIal signal integrity to enhance their system teststrategy. The pair of devices also features an at-speed BISTmode which allows the interconnects between the Serializerand Deserializer to be verified at-speed.
