资 源 简 介
The DS90C387R transmitter is designed to support pixeldata transmission from a Host to a Flat Panel Display up toUXGA resoluTIon. It is designed to be compaTIble with GraphicsMemory Controller Hub( GMCH) by implemenTIng twodata per clock and can be controlled by a two-wire serialcommunicaTIon interface. Two input modes are supported:one port of 12-bit( two data per clock) input for 24-bit RGB,and two ports of 12-bit( two data per clock) input for dual24-bit RGB( 48-bit total). In both modes, input data will beclocked on both rising and falling edges in LVTTL leveloperation, or clocked on the cross over of differential clocksignals in the low swing operation. Each input data width willbe 1/2 of clock cycle. With an input clock at 85MHz and inputdata at 170Mbps, the maximum transmission rate of eachLVDS line is 595Mbps, for a aggregate throughput rate of2.38Gbps/4.76Gbps. It converts 24/48 bits (Single/DualPixel 24-bit color) of data into 4/8 LVDS (Low Voltage DifferentialSignaling) data streams. DS90C387R can be programmedvia the two-wire serial communication interface.The LVDS output pin-out is identical to DS90C387. Thus,this transmitter can be paired up with DS90CF388, receiverof the 112MHz LDI chipset or FPD-Link Receivers in non-DCBalance mode operation which provides GUI/LCD panel/mother board vendors a wide choice of inter-operation withLVDS based TFT panels.
