首页| 行业标准| 论文文档| 电子资料| 图纸模型
购买积分 购买会员 激活码充值

您现在的位置是:团子下载站 > 其他 > 74ls160.pdf

74ls160.pdf

  • 资源大小:333
  • 上传时间:2021-06-23
  • 下载次数:0次
  • 浏览次数:30次
  • 资源积分:1积分
  • 标      签: 74ls160 PDF

资 源 简 介

74ls160.pdf BCD DECADE COUNTERS/4-BIT BINARY COUNTERS The LS160A/161A/162A/163A are high-speed 4-bit synchronous count- ers. They are edge-triggered, synchronously presettable, and cascadable MSI building blocks for counTIng, memory addressing, frequency division and other applicaTIons. The LS160A and LS162A count modulo 10 (BCD). The LS161A and LS163A count modulo 16 (binary.) The LS160A and LS161A have an asynchronous Master Reset (Clear) input that overrides, and is independent of, the clock and all other control inputs. The LS162A and LS163A have a Synchronous Reset (Clear) input that overrides all other control inputs, but is acTIve only during the rising clock edge.
VIP VIP