资 源 简 介
The ’AC564 devices are octal D-type edge-triggered flip-flops that feature inverTIng 3-state outputs designed specifically for driving highly capaciTIve or relaTIvely low-impedance loads. They are parTIcularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the inverse logic levels set up at the data (D) inputs.
A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
