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74HC113 pdf datasheet

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  • 上传时间:2021-07-18
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  • 标      签: 74hc

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MM54HC113/MM74HC113Dual J-K Flip-Flops with PresetGeneral DescripTIonThese high speed J-K Flip-Flops uTIlize advanced silicongateCMOS technology to achieve the high noise immunityand low power dissipaTIon of standard CMOS integrated circuits.These devices can drive 10 LS-TTL loads.These flip-flops are edge sensiTIve to the clock input andchange state on the negative going transition of the clockpulse. Each one has independent J, K, CLOCK, and PRESETinputs and Q and Q inputs. PRESET is independent ofthe clock and accomplished by a low level on the input.The 54HC/74HC logic family is functionally as well as pinoutcompatible with the standard 54LS/74LS logic family.All inputs are protected from damage due to static dischargeby internal diode clamps to VCC and ground.FeaturesY Typical propagation delay: 16 nsY Wide operating voltage range: 2±6VY Low input current: 1 mA maximumY Low quiescent current: 40 mA (74HC Series)Y High output drive: 10 LS-TTL loads
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