Interconnection Noise in VLSI

Interconnections are a most important design issue nowadays. Trends in themicroelectronic industry are leading to unwanted interconnect effects, especiallynoise, becoming more important. This increasing importance is mainlydue to three reasons: increasing integration, increasing signal frequency spectrumcomponents, and increasing complexity.The increase in integration and frequency of signals account for couplingproblems between adjacent lines and a growing importance of parasitic components(capacitance and inductance). These two phenomena introduce analogeffects in digital design, and are therefore direct causes of the noise problem.The increase in complexity is perhaps more indirectly related to noise andthe interconnection problem, but it is also very important. The drive to reducethe time to market of new electronic products make design verification extremelyimportant and this pre-fabrication verification must be as accurate aspossible to reduce the risk of having to redesign failed prototypes. However,the analog effects introduced by interconnections make traditional digital verificationtools inappropriate for addressing the problem. Recently there havebeen many advances in interconnect simulation algorithms and efficient simulatorscan calculate solutions for sophisticated models. This is a very importantsubject and, with these algorithms and computer availability, accurate noisewaveforms for a small number of coupled interconnections can nowadays becalculated easily. The problem is that from the point of view of the whole integratedsystem, the applicability of these sophisticated models is necessarilylimited because today’s digital designs are so complex and the number of interconnectionsis so large that a complete electrical simulation of the whole chipis impossible, as it would take weeks or months.Given this complexity problem for verification, there are two possible solutions:one is to simplify the interconnect models. The other is to addressinterconnect issues from the beginning of the design process, so they can be insome way implemented as design rules in the design flow.