资 源 简 介
The AD9548 provides synchronizaTIon for many systems, including synchronous opTIcal networks (SONET/SDH). The AD9548 generates an output clock synchronized to one of up to four differenTIal or eight single-ended external input references. The digital PLL allows for reducTIon of input time jitter or phase noise associated with the external references. The AD9548 continuously generates a clean (low jitter), valid output clock even when all references have failed by means of a digitally controlled loop and holdover circuitry.
