时钟发生器CDCE949.pdf

Programmable 4-PLL VCXO Clock Synthesizer with 1.8V, 2.5V and 3.3V LVCMOS Outputs The CDCE949 and CDCEL949 are modular PLL-based low cost, high-performance, programmable clocksynthesizers, mulTIpliers and dividers. They generate up to 9 output clocks from a single input frequency. Eachoutput can be programmed in-system for any clock frequency up to 230 MHz, using up to four independentconfigurable PLLs.The CDCx949 has separate output supply pins, VDDOUT, 1.8 V for the CDCEL949, and 2.5 V to 3.3 V forCDCE949.The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip loadcapacitor is adequate for most applicaTIons. The value of the load capacitor is programmable from 0 to 20 pF.AddiTIonally, an on-chip VCXO is selectable, allowing synchronizaTIon of the output frequency to an externalcontrol signal, i.e. a PWM signal.The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, BlueTooth™,Ethernet, GPS) or Interface (USB, IEEE1394, Memory Stick) clocks from a reference input frequency such as27-MHz.All PLLs support SSC (Spread-Spectrum Clocking). SSC can be Center-Spread or Down-Spread clocking. Thisis a common technique to reduce electro-magnetic interference (EMI).Based on the PLL frequency and the divider settings, the internal loop-filter components are automaticallyadjusted to achieve high stability, and to optimize the jitter-transfer characteristics of each PLL.The device supports non-volatile EEPROM programming for easy customization of the device to the application.It is preset to a factory-default configuration (see the Default Device Configuration section). It can bereprogrammed to a different application configuration before PCB assembly, or reprogrammed by in-systemprogramming. All device settings are programmable through the SDA/SCL bus, a 2-wire serial interface.Three programmable control inputs, S0, S1 and S2, can be used to control various aspects of operationincluding frequency selection, changing the SSC parameters to lower EMI, PLL bypass, power down, andchoosing between low level or 3-state for the output-disable function.The CDCx949 operates in a 1.8-V environment. It is characterized for operation from –40°C to 85°C.