资 源 简 介
The VHSIC Hardware DescripTIon Language (VHDL) is a formal notaTIon intended for use in all phases of
the creaTIon of electronic systems. Because it is both machine readable and human readable, it supports the
development, verificaTIon, synthesis, and testing of hardware designs; the communication of hardware
design data; and the maintenance, modification, and procurement of hardware.
