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HIP7020/HIP7020AP pdf datashee

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  • 上传时间:2021-09-18
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  • 标      签: HIP

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The HIP7020 IC is an Integrated I/O Bus Transceiverdesigned for the SAE Standard J1850 Class B Data CommunicaTIonNetwork Interface. The Bus transmits andreceives data on a single wire using a 10.4kHz VPWM (VariablePulse Width Modulated) signal. The HIP7020 serves asan I/O buffer interfacing to 5V CMOS logic. It is designed tooperate directly from the 12V battery line of an automobile.The normal Bus voltage swing capability is from 0V to 7.75Vat currents greater than 20mA.As shown in the Block Diagram, the Transmitter TX Input andthe Receiver RX Output of the Bus Transceiver Circuit interfaceto the control logic. The TX input signal is wave shapedfor rise TIme, fall TIme and amplitude before it is convertedfrom voltage to current. The Wave Shaper with an externalprogramming resistor, RS controls the rise and fall TIme ofthe BUS OUT output signal. The current source drive to theBus is voltage controlled by the Wave Shaped Voltage Referenceto a maximum limit as specified for the J1850 Bus andincludes short-circuit current limiting.The HIP7020 Receiver input, BUS IN is connected to theJ1850 Bus through an external resistor, RF and has a trippoint at one-half of the nominal Bus signal voltage which is3.875V. The Receiver input is filtered to remove high frequencyBus noise by the external resistor and an internalcapacitor. The Receiver Bus signal, after processing, is outputat the RX pin by the RX Buffer’s open collector driver.The RX output is active low and requires an external pull-upresistor returned to the control logic VCC supply. This preventspower-up of the control logic by the transceiver if VCCsupply voltage is removed.
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