资 源 简 介
This device contains four independent noninverTIng buffers and an 8-bit noninverTIng bus transceiver and D-type latch, designed for 1.65-V to 3.6-V VCC operaTIon.
The SN74ALVCH16973 is parTIcularly suitable for demultiplexing an address/data bus into a dedicated address bus and dedicated data bus. The device is used where there is asynchronous bidirectional communication between the A and B data bus, and the address signals are latched and buffered on the Q bus. The control-function implementation minimizes external timing requirements.
This device can be used as one 4-bit buffer, one 8-bit transceiver, and one 8-bit latch. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input.
