资 源 简 介
The AD5693R/AD5692R/AD5691R/AD5693， members of the nanoDAC+® family， are low power， single-channel， 16-/14-/12-bit buffered voltage output DACs. The devices， except the AD5693， include an enabled by default internal 2.5 V reference， offering 2 ppm/°C drift. The output span can be programmed to be 0 V to VREF or 0 V to 2 &TImes; VREF. All devices operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design. The devices are available in a 2.00 mm &TImes; 2.00 mm， 8-lead LFCSP or a 10-lead MSOP. The internal power-on reset circuit ensures that the DAC register is written to zero scale at power-up while the internal output buffer is configured in normal mode. The AD5693R/AD5692R/ AD5691R/AD5693 contain a power-down mode that reduces the current consumpTIon of the device to 2 µA （maximum） at 5 V and provides software selectable output loads. The AD5693R/AD5692R/AD5691R/AD5693 use an I2 C interface. Some device opTIons also include an asynchronous RESET pin and a VLOGIC pin， allowing 1.8 V compatibility
