资 源 简 介
The DS90C387/DS90CF388 transmitter/receiver pair is designedto support dual pixel data transmission between Hostand Flat Panel Display up to QXGA resoluTIons. The transmitterconverts 48 bits (Dual Pixel 24-bit color) of CMOS/TTLdata into 8 LVDS (Low Voltage DifferenTIal Signalling) datastreams. Control signals (VSYNC, HSYNC, DE and twouser-defined signals) are sent during blanking intervals. At amaximum dual pixel rate of 112MHz, LVDS data line speed is672Mbps, providing a total throughput of 5.38Gbps (672Megabytes per second). Two other modes are also supported.24-bit color data (single pixel) can be clocked into thetransmitter at a maximum rate of 170MHz. In this mode, thetransmitter provides single-to-dual pixel conversion, and theoutput LVDS clock rate is 85MHz maximum. The third modeprovides inter-operability with FPD-Link devices.