资 源 简 介
54LS74/DM54LS74A/DM74LS74ADual PosiTIve-Edge-Triggered D Flip-Flopswith Preset, Clear and Complementary OutputsGeneral DescripTIonThis device contains two independent posiTIve-edge-triggeredD flip-flops with complementary outputs. The informaTIonon the D input is accepted by the flip-flops on the positivegoing edge of the clock pulse. The triggering occurs at avoltage level and is not directly related to the transition timeof the rising edge of the clock. The data on the D input maybe changed while the clock is low or high without affectingthe outputs as long as the data setup and hold times are notviolated. A low logic level on the preset or clear inputs willset or reset the outputs regardless of the logic levels of theother inputs.FeaturesY Alternate military/aerospace device (54LS74) is available.Contact a National Semiconductor Sales Office/Distributor for specifications.
