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CD54ACT174, CD74ACT174,pdf(HEX

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  • 标      签: Flip-Flops

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The ’ACT174 devices are posiTIve-edge-triggered D-type flip-flops with a direct clear (CLR) input and are designed for 4.5-V to 5.5-V VCC operaTIon. InformaTIon at the data (D) inputs that meets the setup TIme requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
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