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SN54F373,SN74F373,pdf(Octal Tr

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These 8-bit latches feature 3-state outputs designed specifically for driving highly capaciTIve or relaTIvely low-impedance loads. They are parTIcularly suitable for implemenTIng buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the ´F373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs will follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable () input can be used to place the eight outputs in either a normallogic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.
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