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FB2031 9-bit latched/registered/pass-thru Futurebus+ transceiver
The FB2031 is a 9-bit latched/registeredtransceiver featuring a latched, registered orpass-thru mode in either the A-to-B or B-to-AdirecTIon. The FB2031 is intended to providethe electrical interface to a high performancewired-OR bus.The TTL-level side (A port) has a commonI/O. The common I/O, open collector B portoperates at BTL signal levels. The logicelement for data flow in each direcTIon iscontrolled by two mode select inputs (SEL0and SEL1). A “00” configures latches in bothdirecTIons. A “10” configures thru mode inboth direcTIons. A “01” configures registermode in both directions. A “11” configuresregister mode in the A-to-B direction andlatch mode in the B-to-A direction.When configured in the buffer mode, theinverse of the input data appears at theoutput port. In the register mode, data isstored on the rising edge of the appropriateclock input (LCAB or LCBA). In the latchmode, clock pins serve as transparent-Lowlatch enables. Regardless of the mode, datais inverted from input to output.The 3-State A port is enabled by asserting aHigh level on OEA. The B port has two outputenables, OEB0 and OEB1. Only when OEB0is High and OEB1 is Low is the outputenabled.
