资 源 简 介
The AD9550 is a phase-locked loop （PLL） based clock translator designed to address the needs of wireline communicaTIon and base staTIon applicaTIons. The device employs an integer-N PLL to accommodate the applicable frequency translaTIon requirements. It accepts a single-ended input reference signal at the REF input. The AD9550 is pin programmable， providing a matrix of standard input/output frequency translations from a list of 15 possible input frequencies to a list of 52 possible output frequency pairs （OUT1 and OUT2）。 The AD9550 output is compatible with LVPECL， LVDS， or single-ended CMOS logic levels， although the AD9550 is implemented in a strictly CMOS process. The AD9550 operates over the extended industrial temperature range of −40°C to +85°C.
