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The X25642 is a CMOS 65,536-bit serial E2PROM,internally organized as 8K x 8. The X25642 features aSerial Peripheral Interface (SPI) and software protocolallowing operaTIon on a simple three-wire bus. The bussignals are a clock input (SCK) plus separate data in(SI) and data out (SO) lines. Access to the device iscontrolled through a chip select (CS) input, allowingany number of devices to share the same bus.The X25642 also features two addiTIonal inputs thatprovide the end user with added flexibility. ByasserTIng the HOLD input, the X25642 will ignore transiTIonson its inputs, thus allowing the host to servicehigher priority interrupts. The WP input can be used asa hardwire input to the X25642 disabling all writeattempts to the status register, thus providing a mechanismfor limiting end user capability of altering 0, 1/4,1/2 or all of the memory.The X25642 utilizes Xicor’s proprietary Direct WriteTMcell, providing a minimum endurance of 100,000cycles and a minimum data retention of 100 years.