首页| 行业标准| 论文文档| 电子资料| 图纸模型
购买积分 购买会员 激活码充值

您现在的位置是:团子下载站 > 教程资料 > XAPP806 -决定DDR反馈时钟的最佳DCM相移

XAPP806 -决定DDR反馈时钟的最佳DCM相移

  • 资源大小:322 K
  • 上传时间:2021-05-04
  • 下载次数:0次
  • 浏览次数:28次
  • 资源积分:1积分
  • 标      签: XAPP 806 DDR DCM

资 源 简 介

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
VIP VIP