资 源 简 介
This 10-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCC operaTIon.
The SN74LVC841A is designed specifically for driving highly capaciTIve or relaTIvely low-impedance loads. It is parTIcularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs.
A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
