资 源 简 介
On-chip dither opTIon for improved SFDR performance with low power analog input. 2. Proprietary differenTIal input that maintains excellent SNR performance for input frequencies up to 300 MHz. 3. OperaTIon from a single 1.8 V supply and a separate digital output driver supply accommodaTIng 1.8 V CMOS or LVDS outputs. 4. Standard serial port interface （SPI） that supports various product features and functions， such as data formatting （offset binary， twos complement， or gray coding）， enabling the clock DCS， power-down， test modes， and voltage reference mode. 5. Pin compatibility with the AD9265， allowing a simple migration up to 16 bits.
