资 源 简 介
The LAN8742A/LAN8742Ai is a low-power 10BASE-T/100BASE-TX physical layer （PHY） transceiver with variable I/O voltage that is compliant with the IEEE 802.3 and 802.3u standards. The LAN8742A/LAN8742Ai supports communicaTIon with an Ethernet MAC via a standard RMII interface. It contains a full-duplex 10-BASE-T/100BASE-TX transceiver and supports 10 Mbps （10BASE-T） and 100 Mbps （100BASE-TX） operaTIon. The LAN8742A/LAN8742Ai implements auto-negoTIaTIon to automatically determine the best possible speed and duplex mode of operation. HP Auto-MDIX support allows the use of direct connect or cross-over LAN cables. Integrated Wake on LAN （WoL） support provides a mechanism to trigger an interrupt upon reception of a perfect DA， broadcast， magic packet， or wakeup frame. The LAN8742A/LAN8742Ai supports both IEEE 802.3-2005 compliant and vendor-specific register functions. However， no register access is required for operation. The initial configuration may be selected via the configuration pins as described in Section 3.7， “Configuration Straps”。 Register-selectable configuration options may be used to further define the functionality of the transceiver. The LAN8742A/LAN8742Ai can be programmed to support wake-on-LAN at the physical layer， allowing detection of configurable Wake-up Frame and Magic packets. This feature allows filtering of packets at the PHY layer， without requiring MAC intervention. Additionally， the LAN8742A/LAN8742Ai supports cable diagnostics which allow the device to identify opens/shorts and their location on the cable via vendor-specific registers. Per IEEE 802.3-2005 standards， all digital interface pins are tolerant to 3.6 V. The device can be configured to operate on a single 3.3 V supply utilizing an integrated 3.3 V to 1.2 V linear regulator. The linear regulator may be optionally disabled， allowing usage of a high efficiency external regulator for lower system power dissipation. The LAN8742A/LAN8742Ai is available in commercial （0°C to +70°C） and industrial （-40°C to +85°C） temperature range versions. A typical system application is shown in Figure 1-1. Figure 1-2 provides an internal block diagram of the device.
