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The Cypress CY2 series of network circuits is produced usingadvanced 0.35-micron CMOS technology, achieving theindustry’s fastest logic.The Cypress CY2DL814 fanout buffer features a singleLVDS-, LVPECL-, or LVTTL-compaTIble input and four LVDSoutput pairs.Designed for data-communicaTIon clock management applicaTIons,the fanout from a single input reduces loading on theinput clock.The CY2DL814 is ideal for both level translaTIons from singleended to LVDS and/or for the distribution of LVDS-based clocksignals. The Cypress CY2DL814 has configurable input andoutput functions. The input can be selectable forLVPECL/LVTTL or LVDS signals while the output driver’ssupport standard and high drive LVDS. Drive either a 50-ohmor 100-ohm line with a single part number/device.
Features• Low-voltage operation• VDD = 3.3V• 1:4 Fanout• Single-input configurable for—LVDS, LVPECL, or LVTTL—Four differential pairs of LVDS outputs• Drives 50- or 100-ohm load (selectable)• Low input capacitance• Low output skew• Does not exceed Bellcore 802.3 standards• Operation at ⇒ 350 MHz – 700 Mbps• Low propagation delay Typical (tpd < 4 ns)• Industrial versions available• Packages available include TSSOP/SOIC
