资 源 简 介
These devices are mulTIlevel pipeline registers implementedusing a low power CMOS process. They are pin for pincompaTIble replacements for industry standard mulTIlevelpipeline registers such as the L29C520 and L29C521. TheHSP9520 and HSP5921 are direct replacements for theAM29520 and AM29521 and WS59520 and WS59521.They consist of four 8-bit registers which are dual ported.They can be configured as a single four level pipeline or adual two level pipeline. A single 8-bit input is provided, andthe pipelining configuraTIon is determined by the instructioncode input to the I0 and I1 inputs (see instruction control).The contents of any of the four registers is selectable at themultiplexed outputs through the use of the S0 and S1multiplexer control inputs (see register select. The output is8 bits wide and is three-stated through the use of the OEinput.The HSP9520 and HSP9521 differ only in the way data isloaded into and between the registers in dual two-leveloperation. In the HSP9520 when data is loaded into the firstlevel the existing data in the first level is moved to thesecond level. In the HSP9521 loading the first level simplycauses the current data to be overwritten. Transfer of data tothe second level is achieved using the single four level mode(I1, I0 = ‘0’). This instruction also causes the first level to beloaded. The HOLD instruction (I1, I0 = ‘1’) provides a meansof holding the contents of all registers.
