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3V/5V±10V输入范围1兆瓦的3通道16位ADC ad7707数据表

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  • 上传时间:2021-12-08
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  • 标      签: ad7707 adc

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The AD7707 is a complete analog front end for low frequency measurement applicaTIons. This 3-channel device can accept either low level input signals directly from a transducer or high level (±10 V) signals and produce a serial digital output. It employs a Σ-Δ conversion technique to realize up to 16 bits of no missing codes performance. The selected input signal is applied to a proprietary programmable gain front end based around an analog modulator. The modulator output is processed by an on-chip digital filter. The first notch of this digital filter can be programmed via an on-chip control register allowing adjustment of the filter cutoff and output update rate. The AD7707 operates from a single 2.7 V to 3.3 V or 4.75 V to 5.25 V supply. The AD7707 features two low level pseudo differenTIal analog input channels, one high level input channel and a differenTIal reference input. Input signal ranges of 0 mV to 20 mV through 0 V to 2.5 V can be accommodated on both low level input channels when operaTIng with a VDD of 5 V and a reference of 2.5 V. They can also handle bipolar input signal ranges of ±20 mV through ±2.5 V, which are referenced to the LCOM input. The AD7707, with a 3 V supply and a 1.225 V reference, can handle unipolar input signal ranges of 0 mV to 10 mV through 0 V to 1.225 V. Its bipolar input signal ranges are ±10 mV through ±1.225 V. The high level input channel can accept input signal ranges of ±10 V, ±5 V, 0 V to 10 V and 0 V to 5 V. The AD7707 thus performs all signal conditioning and conversion for a 3-channel system. The AD7707 is ideal for use in smart, microcontroller or DSPbased systems. It features a serial interface that can be configuredfor 3-wire operation. Gain settings, signal polarity and update rate selection can be configured in software using the input serial port. The part contains self-calibration and system calibration options to eliminate gain and offset errors on the part itself or in the system. CMOS construction ensures very low power dissipation, and the power-down mode reduces the standby power consumption to 20 μW typical. This part is available in a 20-lead wide body (0.3 inch) small outline (SOIC) package and a low profile 20-lead TSSOP.
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