资 源 简 介
The TPS310x and TPS311x families of supervisory circuits provide circuit iniTIalizaTIon and TIming supervision, primarily for DSP and processor-based systems.
During power-on, RESET is asserted when the supply voltage (VDD) becomes higher than 0.4 V. Thereafter, the supervisory circuit monitors VDD and keeps the RESET output acTIve as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state to ensure proper system reset. The delay time starts after VDD has risen above VIT. When VDD drops below VIT, the output becomes active again.
All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.
The TPS3103 and TPS3106 have an active-low, open-drain RESET output.
