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您现在的位置是:团子下载站 > 电源技术 > 四通道12/14/16位DAC芯片与纳米理论参考I2C接口ad5625r/ad5645r/ad5665r/ad5625/ad5665数据表

四通道12/14/16位DAC芯片与纳米理论参考I2C接口ad5625r/ad5645r/ad5665r/ad5625/ad5665数据表

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  • 标      签: ad5625r I2C dac

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The AD5625R/AD5645R/AD5665R and AD5625/AD5665 members of the nanoDAC® family are low power, quad, 12-/ 14-/16-bit, buffered voltage-out DACs with/without an on-chip reference. All devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design, and have an I2 C-compaTIble serial interface. The AD5625R/AD5645R/AD5665R have an on-chip reference. The LFCSP versions of the AD5625R/AD5645R/AD5665R have a 1.25 V or 2.5 V, 10 ppm/°C reference, giving a full-scale output range of 2.5 V or 5 V; the TSSOP versions of the AD5625R/ AD5645R/AD5665R have a 2.5 V, 5 ppm/°C reference, giving a full-scale output range of 5 V. The WLCSP has a 1.25 V reference. The on-chip reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a software write. The AD5625/AD5665 require an external reference voltage to set the output range of the DAC. The device incorporates a power-on reset circuit that ensures that the DAC output powers up to 0 V (POR = GND) or midscale (POR = VDD) and remains there unTIl a valid write occurs. The on-chip precision output amplifier enables rail-to-rail output swing
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