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MM54HC646/MM74HC646 Non-InverTIngOctal Bus Transceiver/RegistersMM54HC648/MM74HC648InverTIng Octal Bus Transceiver/RegistersGeneral DescripTIonThese transceivers uTIlize advanced silicon-gate CMOStechnology, and contain two sets of TRI-STATEÉ outputs,two sets of D-type flip-flops, and control circuitry designedfor high speed multiplexed transmission of data.Six control inputs enable this device to be used as a latchedtransceiver, unlatched transceiver, or a combination of both.As a latched transceiver, data from one bus is stored forlater retrieval by the other bus. Alternately real time busdata (unlatched) may be directly transferred from one bus toanother.Circuit operation is determined by the G, DIR, CAB, CBA,SAB, SBA control inputs. The enable input, G, controlswhether any bus outputs are enabled. The direction control,DIR, determines which bus is enabled, and hence the directiondata flows: The SAB, SBA inputs control whether thelatched data (stored in D type flip flops), or the bus data(from other bus input pins) is transferred. Each set of flipflopshas its own clock CAB, and CBA, for storing data. Datais latched on the rising edge of the clock.Each output can drive up to 15 low power Schottky TTLloads. These devices are functionally and pin compatible totheir LS-TTL counterparts. All inputs are protected fromdamage due to static discharge by diodes to VCC andground.FeaturesY Typical propagation delay: 14 nsY TRI-STATE outputsY Bidirectional communicationY Wide power supply range: 2±6VY Low quiescent supply current: 160 mAmaximum (74HC)Y High output current: 6 mA (74HC)
