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74HC157 pdf datasheet

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  • 标      签: 74HC1

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MM54HC157/MM74HC157 Quad 2-Input MulTIplexerMM54HC158/MM74HC158 Quad 2-Input MulTIplexer(Inverted Output)General DescripTIonThese high speed Quad 2-to-1 Line data selector/MulTIplexersutilize advanced silicon-gate CMOS technology. Theypossess the high noise immunity and low power consumptionof standard CMOS integrated circuits, as well as theability to drive 10 LS-TTL loads.These devices each consist of four 2-input digital multiplexerswith common select and STROBE inputs. On theMM54HC157/MM74HC157, when the STROBE input is atlogical ``0' the four outputs assume the values as selectedfrom the inputs. When the STROBE input is at a logical ``1'the outputs assume logical ``0'. The MM54HC158/MM74HC158 operates in the same manner, except that itsoutputs are inverted. Select decoding is done internally resultingin a single select input only. If enabled, the selectinput determines whether the A or B inputs get routed totheir corresponding Y outputs.The 54HC/74HC logic family is functionally as well as pinoutcompatible with the standard 54LS/74LS logic family.All inputs are protected from damage due to static dischargeby internal diode clamps to VCC and ground.FeaturesY Typical propagation delay: 14 ns data to any outputY Wide power supply range: 2±6VY Low power supply quiescent current: 80 mA maximum(74HC Series)Y Fan-out of 10 LS-TTL loadsY Low input current: 1 mA maximum
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