首页| 行业标准| 论文文档| 电子资料| 图纸模型
购买积分 购买会员 激活码充值

您现在的位置是:团子下载站 > 其他 > SN75LVDS83,pdf(Flatlink Transm

SN75LVDS83,pdf(Flatlink Transm

  • 资源大小:406
  • 上传时间:2021-11-14
  • 下载次数:0次
  • 浏览次数:83次
  • 资源积分:1积分
  • 标      签: transmitte

资 源 简 介

The SN75LVDS83 FlatLink transmitter contains four 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and five low-voltage differenTIal-signaling (LVDS) line drivers in a single integrated circuit. These funcTIons allow 28 bits of single-ended low-voltage TTL (LVTTL) data to be synchronously transmitted over five balanced-pair conductors for receipt by a compaTIble receiver, such as the SN75LVDS82. The SN75LVDS83 can also be used in 21-bit links with the SN75LVDS86 receiver. When transmitTIng, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected by way of the clock select (CLKSEL) terminal.
VIP VIP