资 源 简 介
MM54HC4514/MM74HC45144-to-16 Line Decoder with LatchGeneral DescripTIonThis uTIlizes advanced silicon-gate CMOS technology, whichis well suited to memory address decoding or data rouTIngapplicaTIon. It possesses high noise immunity and low powerdissipation usually associated with CMOS circuitry, yetspeeds comparable to low power Schottky TTL circuits. Itcan drive up to 10 LS-TTL loads.The MM54HC4514/MM74HC4514 contain a 4-to-16 linedecoder and a 4-bit latch. The latch can store the data onthe select inputs, thus allowing a selected output to remainhigh even though the select data has changed. When theLATCH ENABLE input to the latches is high the outputs willchange with the inputs. When LATCH ENABLE goes lowthe data on the select inputs is stored in the latches. Thefour select inputs determine which output will go high providedthe INHIBIT input is low. If the INHIBIT input is high alloutputs are held low thus disabling the decoder.The MM54HC4514/MM74HC4514 is functionally and pinoutequivalent to the CD4514BM/CD4514BC and theMC1451BA/MC1451BC. All inputs are protected againstdamage due to static discharge diodes from VCC andground.
