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NE5561 NE5568的外部同步

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  • 上传时间:2021-10-22
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  • 标      签: NE5561 NE5

资 源 简 介

Synchronization of the 5561 can be accomplished by forcing thetiming pin (Pin 5) above the 5.6V sawtooth limit comparator for ashort time.A drawback to this approach is that when the 5.6V threshold isreached, a discharge transistor is turned on to quickly pull the timingcapacitor to ground and will also attempt to pull the pulse generatorto ground. This condition can be avoided by keeping the pulse widthvery narrow (0.1ms) or by placing a differentiator network betweenthe pulse generator and the diode.
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