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packetclock™扩频时钟发生器CY26121

  • 资源大小:0.77 MB
  • 上传时间:2021-10-18
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  • 资源积分:1积分
  • 标      签: CY26121 时钟发生器

资 源 简 介

Features Integrated phase-locked loop (PLL) Low jitter, high-accuracy outputs 3.3 V operaTIon 25 MHz input frequency 33.33 MHz or 25 MHz selectable output frequency (-21)   Benefits High-performance PLL tailored for spread spectrum applicaTIon Meets criTIcal TIming requirements in complex system designs Enables application compatibility Works with commonly available crystal or driven reference Downspread spread spectrum with 30 kHz nominal modulation frequency Functional Description For a complete list of related resources, click here.
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