资 源 简 介
These 18-bit bus-interface flip-flops feature 3-state outputs designed specifically for driving highly capaciTIve or relaTIvely low-impedance loads. They are parTIcularly suitable for implemenTIng wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The ’ABT162823A devices can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (CLKEN) input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN high disables the clock buffer, thus latching the outputs. Taking the clear (CLR) input low causes the Q outputs to go low independently of the clock.
A buffered output-enable (OE) input places the nine outputs in either a normal logic state (high or low level) or a high-impedance state.
