资 源 简 介
These octal bus transceivers are designed for asynchronous communicaTIon between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direcTIon-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effecTIvely isolated.
To ensure the high-impedance state during power up or power down, OE should be TIed to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
