资 源 简 介
The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 are differenTIal line receivers that implement the electrical characterisTIcs of low-voltage differenTIal signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differenTIal standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.
The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 .
