资 源 简 介
The ML9060 consists of a 320-bit shift register, a 320-bit data latch, 160 sets of LCD drivers, and a common signal generator circuit. The LCD display data is input serially to the shift register from the DATA IN pin in synchronizaTIon with the CLOCK IN signal, and is stored in the data latch by the LOAD IN signal. The LCD display data stored in the data latch is output via the LCD drivers. A maximum of 160 segments of LCD can be driven in staTIc display mode and a maximum of 320 segments can be driven directly in the 1/2 duty display mode. It is possible to select the mode of using the internal oscillator circuit or the mode of using an external clock for the common signal generator circuit. The ML9060 also outputs the sync signal during the 1/2 duty display mode.
