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SN74CBTLV3857,pdf(LOW-VOLTAGE

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  • 上传时间:2021-08-27
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  • 标      签: Switch

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This 10-bit FET bus switch is designed for 3-V to 3.6-V VCC operaTIon and SSTL_2 output-enable (OE) input levels. When OE is low, the 10-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between the two ports. There are 10-k pulldown resistors to ground on the B port. The FET switch on-state resistance is designed to replace the series terminaTIng resistor in the SSTL_2 data path. This device is fully specified for parTIal-power-down applicaTIons using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
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