资 源 简 介
主要是画dxp原理图的注意事项
原理图常见错误principle of common mistakes
1、ERC报告管脚没有接入信号ERC report no access to signal pins
1)创建封装时给管脚定义了I/O属性creaTIon package to the pin at the definiTIon of I/O attribute
2)创建元件或放置元件时修改了不一致的grid属性,管脚与线没有连上。create components or modify components placed inconsistent grid attributes, and the lines do not pin connecTIon;
3)创建元件时pin方向反向,必须非pin name端连线。create components reverse direcTIon when the pin, non-name-pin connections.
2、元件跑到图纸界外:没有在元件库图表纸中心创建元件。 components went to the drawings profession : no paper charts component library center components.
3、创建的工程文件网络表只能部分调入pcb:生成netlist时没有选择为global。the creation of the document network table works only partially transferred PCB : netlist generation did not choose to global.
4、当使用自己创建的多部分组成的元件时,千万不要使用annotate. When the use of their own creation, multi-component element, we must use annotate.