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CD54HC4015, CD74HC4015,pdf(Hig

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  • 上传时间:2021-08-10
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  • 标      签: Logic CMOS

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The ’HC4015 consists of two idenTIcal, independent, 4-stage serial-input/parallel-output registers. Each register has independent Clock (CP) and Reset (MR) inputs as well as a single serial Data input. "Q" outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the Data input is transferred into the first register stage and shifted over one stage at each posiTIve- going clock transiTIon. ResetTIng of all stages is accomplished by a high level on the reset line. The device can drive up to 10 low power Schottky equivalent loads. The ’HC4015 is an enhanced version of equivalent CMOS types.
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