资 源 简 介
Sleep and Standby Modes There are a relaTIvely limited number of blocks that must be configured to set the device into （or wake the device from） both Sleep and Standby modes.
Table 1 shows the steps required to set the device into these two operaTIng modes. Registers associated with Sleep mode are marked in blue. It is presumed that both the analog-to digital converter （ADC） and digital-to-analog converter （DAC） channels are used; otherwise， the corresponding steps can be skipped. Note that the ADC and DAC power bits are also associated with miniDSP_A and miniDSP_D power-up; if the miniDSP_A is used to complement miniDSP_D processing in the AIC3256， or vice-versa， then both the ADC and DAC channels must be powered.
When going into either Sleep or Standby mode， it is recommended to keep the master clock running unTIl all steps are complete. Specific requirements are noted in Table 1.
