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SN54AS286,SN74AS286,pdf(9-Bit

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  • 标      签: Generators

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The SN54AS286 and SN74AS286 universal 9-bit parity generators/checkers feature a local output for parity checking and a 48-mA bus-drivingparity input/output (I/O) port for parity generaTIon/checking. The word-length capability is easily expanded by cascading. The transmit () control input is implemented specifically to accommodate cascading. When is low, the parity tree is disabled and PARITY ERROR remains at a high logic level regardless of the input levels. When is high, the parity tree is enabled. PARITY ERROR indicates a parity error when either an even number of inputs (A-I) are high and PARITY I/O is forced to a low logic level, or when an odd number of inputs are high and PARITY I/O is forced to a high logic level.
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