资 源 简 介
The x92FCT841T bus-interface latches are designed to eliminate addiTIonal packages required to buffer exisTIng latches and provide addiTIonal data width for wider address/data paths or buses carrying parity. The x92FCT841T devices are buffered 10-bit-wide versions of the FCT373 funcTIon.
The x92FCT841T devicesx92 high-performance interface is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
