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The Ultra37000™ family of CMOS CPLDs provides a range ofhigh-density programmable logic soluTIons with unparalleledsystem performance. The Ultra37000 family is designed tobring the flexibility, ease of use, and performance of the 22V10to high-density CPLDs. The architecture is based on a numberof logic blocks that are connected by a Programmable InterconnectMatrix (PIM). Each logic block features its ownproduct term array, product term allocator, and 16 macrocells.The PIM distributes signals from the logic block outputs and allinput pins to the logic block inputs.All of the Ultra37000 devices are electrically erasable and In-System Reprogrammable (ISR), which simplifies both designand manufacturing flows, thereby reducing costs. The ISRfeature provides the ability to reconfigure the devices withouthaving design changes cause pinout or TIming changes. TheCypress ISR funcTIon is implemented through a JTAGcompliantserial interface. Data is shifted in and out throughthe TDI and TDO pins, respecTIvely. Because of the superiorroutability and simple timing model of the Ultra37000 devices,ISR allows users to change existing logic designs while simultaneouslyfixing pinout assignments and maintaining system performance.
