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SN74LVT125-Q1,pdf(3.3-V ABT Qu

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  • 标      签: bus

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This bus buffer is designed specifically for low-voltage (3.3-V) VCC operaTIon, but with the capability to provide a TTL interface to a 5-V system environment. The SN74LVT125-Q1 features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is high. AcTIve bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for parTIal-power-down applicaTIons using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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